• IC Verification Engineer

    Position responsibilities:

    1. Verification of SOC chip module, subsystem and system and verification of SoC chip.

    2. Test case compilation and simulation verification of SoC system.

    3. Build Verilog verification platform and UVM verification platform for IP and SoC.

    4. Develop IP test plan and testing code preparation, debugging and so on.

    5. Feedback problems in testing and validation process to relevant colleagues, and assist in optimizing and improving IP and SoC.

    Qualification
    1. Master's degree or above, with 2-3 years experience in IC verification.
    2. Familiar with UVM/VMM/OVM and other verification methodologies.
    3. Familiar with Verilog and Perl language and proficient in using Linux operating system.
    4. Familiar with EDA tools such as nLint vcs verdi.

    5. Familiar with AMBA protocols such as AHB, APB and AXI, with verification experience of complex IP or SoC system.
    6. Have a certain compilation and C language development capability.
    7. Familiar with one or more IP:UART, SPI, I2C, EFLASH, SRAM, WDT, etc.
    8. Familiar with general MCU validation process.
    9. Familiar with PCIE and DDR preferred.
    10. Experience in Emulator debugging is preferred.
    11. Careful, steadfast, good communication skills and teamwork spirit.

     

  • Digital Chip Design Engineer

    Position responsibilities:
    Responsible for the following or more work:
    1. Define the top-level or module level design spec according to the market demand, complete the detailed design document according to the design spec, and write the HDL code.
    2. RTL code preparation, wiring before and after validation and project logic verification.
    3. Synthesis / time series analysis / formal verification.
    4. Work with system engineer to complete application verification of FPGA prototype or chip.

    Qualification:
    1. 2-3 years experience in digital chip design.
    2. Proficient in front-end design language: Verilog, at least familiar with one field (simulation, synthesis, timing analysis, formal verification, etc.).
    3. Familiar with Unix/Linux system and Perl/Python/Shell language.
    4. Familiarity with FPGA and its related tools. Be careful, steadfast, have good communication skills and teamwork spirit. 

    Mail:Hr_Admin@think-force.com